Silicon Valley

Our premier client is seeking a Senior Physical Design Engineer to develop designs for AI/ML centric and CPU architectures. This role will involve performing Logic Equivalence Checks (LEC) to ensure functional consistency between RTL and gate-level netlists, along with debugging and resolving equivalence issues. This role will also work closely with front-end design teams and engage in physical design tasks such as synthesis, PnR, and timing closure. This is a hybrid role with possible locations in Silicon Valley and Austin, TX. Responsibilities: Requirements: Immigration Requirements: This role requires candidates to be a US Citizen or US Permanent Resident. This role will consider a H1-B transfer for a strong candidate currently residing in the United States. Relocation Assistance: This position will provide relocation assistance for the selected candidate. #physicaldesign #asicdesign #chipdesign #systemonachip #semiconductor #ai #ml