Our premier AI/ML client is seeking a Senior ASIC Design Engineer to lead the digital design efforts of their custom IP and SoC designs. The Senior ASIC Design Engineer will work with team members to design and develop digital modules from concept stage to tape out and/or FPGA release. This position will be part of our Hardware Development group. The Senior ASIC Design Engineer needs to be able to start from a product requirement specification, develop a feasible micro-architecture, implement the function using RTL language, chip verification, and chip tape out.
Responsibilities:
- Lead in chip specification and micro-architecture.
- Understand product requirements, gather the relevant information, and develop a solution.
- Use RTL language to design the digital functional modules.
- Mentor junior-level ASIC Design Engineers.
- Program, debug, and build the FPGA for system verification.
- Use simulation tools to check the functionalities of the designs in RTL and gate level.
- Collaborate with other team members to define a verification methodology and a test plan
- Write clear documentation of the designs.
Requirements:
- BS/MS in Electrical Engineering or Computer Engineering or related experience
- 7+ years of experience in digital logic design from specification/micro-architecture to tape out.
- Good understanding of modern computational architectures.
- Fluent in Verilog and System Verilog
- Knowledge of ARM based SoC architecture and system busses (AHB, AXI, APB) is strongly desired.
- Knowledge of standard SoC interfaces (SPI, I2C) and high-speed IO protocols (PCIe, USB, DDR).
- Good skills in Python and shell scripting are desired
- Good debugging skills, and well experienced with VCS/Verdi or similar toolsets.
Immigration Requirements:
This role will consider a H1-B transfer for a strong candidate currently residing in the United States.
Relocation Assistance:
This position will provide relocation assistance for the selected candidate
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