We’re hiring a Software Embedded Systems Architect to develop the lowest layers of that stack: the runtime, firmware, and device software that sit between high-level AI workloads and custom accelerator hardware. You’ll help build the software responsible for device bring-up, kernel dispatch, memory mapping, queueing, synchronization, performance monitoring, and debug infrastructure.
Note: All candidates MUST have at least 10 years of software embedded systems experience. All candidates MUST be a US Citizen or US Green Card Holder, and reside in the san Francisco Bay/Silicon Valley Area.
Responsibilities:
- Own critical boot and runtime contracts: firmware image layout, configuration, core release, liveness detection, shared queues, command/completion formats, memory mappings, and versioned ABIs.
- Build and optimize low-latency communication paths between host runtime software and accelerator cores, including submission/completion queues, doorbells, interrupts, polling paths, and synchronization mechanisms.
- Work with custom processor cores, multi-core coordination, traps/exceptions, page tables, protection mechanisms, MMIO, DMA, and accelerator memory hierarchies.
- Develop observability and debug infrastructure for a complex distributed accelerator system, including boot metrics, hardware counters, trace capture, performance monitoring, debug paths, and failure diagnosis for hung or slow jobs.
- Help shape the production device software architecture: the boundary between kernel-mode components, user space runtime libraries, simulator backends, and hardware-native backends.
- Collaborate closely with hardware architects, compiler/runtime engineers, kernel developers, and performance engineers to define the software/hardware contracts for future chips.
- Debug issues that cross abstraction layers: AI graph execution, runtime scheduling, device queues, firmware, memory translation, interrupts, simulator behavior, and hardware state.
Requirements:
- Bachelor’s or Master’s in Computer Science, Computer Engineering, or a related field.
- 10+ years of experience building low-level systems software, firmware, runtimes, operating systems, device drivers, or accelerator software.
- Strong C programming skills and comfort reading or writing assembly where needed.
- Low-level firmware experience, especially privilege modes, control/status registers, traps, memory protection, virtual memory, multi-core boot, or hardware debug support.
- Deep understanding of computer architecture fundamentals: CPU privilege modes, virtual memory, interrupts, atomics, caches, memory ordering, MMIO, DMA, and performance counters.
- Experience with one or more of: processor firmware, ARM or RISC-V systems software, Linux kernel drivers, bare-metal firmware, bootloaders, hypervisors, RTOS internals, or accelerator runtimes.
- Experience with simulator and silicon bring-up: QEMU, virtual platforms, SystemC, RTL simulation, FPGA/prototyping, or first-silicon debug.
- Comfortable working in a fast-moving environment where simulators, firmware, drivers, runtime libraries, and hardware specs are evolving together.
- Excellent communication skills and the ability to collaborate across hardware, compiler, runtime, and product teams.
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