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Semiconductor

Senior Compiler Engineer (AI/Startup) – Silicon Valley

Our premier Silicon Valley AI startup client is hiring a Senior Compiler Engineer to design, develop, and maintain critical components of our AI-driven compilation stack. You will work on PyTorch, Triton, LLVM, and MLIR to build robust, scalable, and high-performance solutions for diverse hardware backends. Note: All candidates MUST have at least 8 years of complier experience. Responsibilities: Requirements: Visa Requirements: #compiler #LLVM #MLIR #pytorch #artificialintelligence #softwareengineering #hiring #startup

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Silicon Technology Partnerships Lead (AI/Startup) – Silicon Valley

Our premier Silicon Valley AI startup client is hiring a senior-level Silicon Technology Partnerships Lead to be responsible for developing strategic partnerships and executing agreements across silicon, IP and other advanced technologies. This role will be critical in establishing the relationships and partnerships that will enable the successful development of their AI infrastructure that will generate the world’s most demanding AI workloads. Note: All candidates MUST have at least 8 years of industry experience for this role. All candidates MUST currently live in the United States (preferably in the SF Bay Area). Responsibilities: Requirements: Visa Requirements: #electricalengineering #manufacturingengineering #artificialintelligence #HPC #servers #asicdesign #semiconductor#siliconpartnership #supplychain #broadcom #marvell #intel #nvidia

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SoC/ASIC Design Engineer (AI/ML Startup)

Our Southern California AI/ML Startup Client is seeking a SoC/ASIC Design Engineer to lead the digital design efforts of their custom IP and SoC designs. The SoC/ASIC Design Engineer will work with team members to design and develop digital modules from concept stage to tape out and/or FPGA release. This position will be part of our Hardware Development group. The SoC/ASIC Design Engineer needs to be able to start from a product requirement specification, develop a feasible micro-architecture, implement the function using RTL language, chip verification, and chip tape out. Note: All candidates MUST have at least 3 years of industry experience for this role. We are not currently accepting recent college graduates at this time. All candidates MUST currently live in the United States. Responsibilities: Requirements: Salary Range: Relocation and Visa Requirements: #machinelearning #ml #artificialintelligence #ai #systemonachip #asicdesign #designverification #hardwareengineering #semiconductor #chipdesign #digitaldesign #startup #layoff #hiring #hiringnow

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Senior SoC/ASIC Design Engineer (AI/ML Startup)

Our Southern California AI/ML Startup Client is seeking a Senior SoC/ASIC Design Engineer to lead the digital design efforts of their custom IP and SoC designs. The Senior SoC/ASIC Design Engineer will work with team members to design and develop digital modules from concept stage to tape out and/or FPGA release. This position will be part of our Hardware Development group. The Senior SoC/ASIC Design Engineer needs to be able to start from a product requirement specification, develop a feasible micro-architecture, implement the function using RTL language, chip verification, and chip tape out. Responsibilities: Requirements: Salary Range: Relocation and Visa Requirements: #machinelearning #ml #artificialintelligence #ai #systemonachip #asicdesign #designverification #hardwareengineering #semiconductor #chipdesign #digitaldesign #startup #layoff #hiring #hiringnow

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Senior RFIC Design Engineer (Automotive Radar)

Our SF Bay Area fabless semiconductor client is seeking a Senior RFIC Design Engineer to design a ground-breaking power consumption automotive radar chip that will successfully communicate across multiple 5G satellite communication systems. You will be a part of a small design team that will be responsible for the front-end circuit architecture and design. Responsibilities: Requirements: #ev #automotive #hardwareengineering #semiconductor #chipdesign #rfic #circuitdesign

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